********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Mar 17, 2014
*ECN S14-0480, Rev. A
*File Name: SQS482EN_HS.txt
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet.  Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SQS482EN D G S 
M1 3 GX S S NMOS W= 3878570u L= 0.25u 
M2 S GX S D PMOS W= 3878570u L= 0.22u
R1 D 3 5.246e-03 4.153e-03 6.900e-06 
CGS GX S 8.433e-10 
CGD GX D 7.076e-11 
RG G GY 10.4 
RTCV 100 S 1e6 -3.662e-05 -8.178e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 3878570u 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 1.237e-05 NSUB = 1.4064e+17 
+ KAPPA = 2.120e-01 NFS = 5.958e+11 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 6.502e+15 IS = 0 TPG = -1 CAPOP = 12 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.000e-08 TREF = 25 BV = 31 
+RS = 1.425e-02 N = 1.000e+00 IS = 3.996e-13 
+EG = 1.195e+00 XTI = 6.533e-01 TRS = 3.594e-03 
+CJO = 2.023e-10 VJ = 3.000e-01 M = 3.464e-01 ) 
.ENDS 
